The continuing evolution of server and storage technology and related communication standards require designers to adapt to new test methodologies for compliance, calibration and automation. During our live seminar, we’ll review not only what is needed for transmitter and receiver testing of existing Gen 3 & Gen 4 standards, but also look at how those standards are likely to evolve. After the conclusion of our presentation, attendees will have the opportunity to participate in a live demonstration of the concepts discussed. All registrants will receive copies of the presentation materials. Topics to be covered include:
Registration is limited, sign up today to reserve your spot.
Tektronix Santa Clara Campus
4250 Burton Drive
Santa Clara, CA
Cost: Free, but registration is required.
Both a continental breakfast and lunch will be provided.
8:30 – 9:00: Introduction, Coffee & Check-in
9:00 – 10:00: Industry Overview, Pain Points and Challenges
10:00 – 10:30: Tektronix: PCIE/SAS/SATA Tx & Rx Standards & Solutions
10:30 – 11:30: Test System Demonstrations
11:30 – 12:00: Granite River Labs: PCIE Base Rx & SAS Rx
12:00 – 1:00: Lunch
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Joe is responsible for product marketing for PCIe, SAS, and SATA solutions. Joe Allen has over 15 years of experience in the field of high speed serial data communications. Joe holds a Bachelor’s Degree in Electrical Engineering from the University of Michigan, and has completed graduate-level engineering courses at Stanford University. He has worked as a Design Engineer at IBM and Product Line Manager at JDSU and Semtech, and has served on industry standards bodies such as the Telecommunications Industry Association (TIA) and the Optical Internetworking Forum (OIF).
Peter Tomaszewski specializes in high-speed serial designs including jitter, BER, and compliance testing on interfaces such as PCIe, Ethernet, HDMI, Displayport, and backplane designs. Prior to joining Tektronix he served in engineering roles at Ericsson, Force10 Networks and IBM. Peter holds a BSEE from Rensselaer Polytechnic Institute.
Darren leads GRL's Ethernet test program world-wide, and manages a variety of datacom-focused projects in Santa Clara. Prior to joining GRL, Darren spent over 8 years at Tektronix where he was a senior application engineer, and two years at JDSU prior to that. Darren is an expert in receiver testing, and his wide-breadth of expertise in high-speed serial data standards includes 100G Ethernet, OIF-CEI, PAM-4, PCI Express, SAS, USB, DisplayPort, and MIPI.
Eugene leads GRL's world-wide lab services (five labs and counting). Prior to GRL, spent two years at Toshiba America Electronic Components (TAEC) where he was a Senior Hardware Engineering Validation Manager, and over 13 years at PLX Technology (now Broadcom) as Senior Design Manager. Eugene is an expert in silicon and system characterization, as well as SERDES and discrete components validation. He has extensive expertise in receiver and transmitter testing for PCI Express, SAS, SATA, and other high speed data standards.